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74F538 1-of-8 Decoder with 3-STATE Outputs
April 1988 Revised January 2004
74F538 1-of-8 Decoder with 3-STATE Outputs
General Description
The 74F538 decoder/demultiplexer accepts three Address (A0-A2) input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active LOW or active HIGH. A HIGH Signal on either of the active LOW Output Enable (OE) inputs forces all outputs to the high impedance state. Two active HIGH and two active LOW input enables are available for easy expansion to 1-of 32 decoding with four packages, or for data demultiplexing to 1-of-8 or 1-of-16 destinations.
Features
s Output polarity control s Data demultiplexing capability s Multiple enables for expansion s 3-STATE outputs
Ordering Code:
Order Number 74F538SC 74F538PC Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
(c) 2004 Fairchild Semiconductor Corporation
DS009551
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74F538
Unit Loading/Fan Out
Pin Names A0-A2 E1 , E2 E3 , E4 P OE1, OE2 O0-O7 Address Inputs Enable Inputs (Active LOW) Enable Inputs (Active HIGH) Polarity Control Input Output Enable Inputs (Active LOW) 3-STATE Outputs Description U.L. HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 150/40 (33.3) Input IIH/IIL Output IOH/IOL 20 A/-0.6 mA 20 A/-0.6 mA 20 A/-0.6 mA 20 A/-0.6 mA 20 A/-0.6 mA
-3 mA/24 mA (20 mA)
Truth Table
Inputs Function High Impedance Disable OE1 H X L L L L Active HIGH Output (P = L) L L L L L L L L Active LOW Output (P = H) L L L L L L L L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
Outputs E4 X X X X X L H H H H H H H H H H H H H H H H A2 X X X X X X L L L L H H H H L L L L H H H H A1 X X X X X X L L H H L L H H L L H H L L H H A0 X X X X X X L H L H L H L H L H L H L H L H H L L L L L L L L H H H H H H H L H L L L L L L H L H H H H H H L L H L L L L L H H L H H H H H L L L H L L L L H H H L H H H H L L L L H L L L H H H H L H H H L L L L L H L L H H H H H L H H L L L L L L H L H H H H H H L H L L L L L L L H H H H H H H H L Outputs Equal P Input O0 Z Z O1 Z Z O2 Z Z O3 Z Z O4 Z Z O5 Z Z O6 Z Z O7 Z Z
OE2 X H L L L L L L L L L L L L L L L L L L L L
E1 X X H X X X L L L L L L L L L L L L L L L L
E2 X X X H X X L L L L L L L L L L L L L L L L
E3 X X X X L X H H H H H H H H H H H H H H H H
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74F538
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74F538
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA)
-65C to +150C -55C to +125C -55C to +150C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0C to +70C
+4.5V to +5.5V
-0.5V to VCC -0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VIH VIL VCD VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 10% VCC 10% VCC 5% VCC 5% VCC VOL IIH IBVI ICEX VID IOD IIL IOZH IOZL IOS IZZ ICCH ICCL ICCZ Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current 31 37 37 -60 4.75 3.75 -0.6 50 -50 -150 500 45 56 56 10% VCC 2.5 2.4 2.7 2.7 0.5 5.0 7.0 50 V A A A V A mA A A mA A mA mA mA Min Max Max Max 0.0 0.0 Max Max Max Max 0.0V Max Max Max V Min Min 2.0 0.8 -1.2 Typ Max Units V V V Min VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -1 mA IOH = -3 mA IOH = -1 mA IOH = -3 mA IOL = 20 mA VIN = 2.7V VIN = 7.0V VOUT = VCC IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V VOUT = 2.7V VOUT = 0.5V VOUT = 0V VOUT = 5.25V VO = HIGH VO = LOW VO = HIGH Z
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74F538
AC Electrical Characteristics
TA = +25C Symbol Parameter Min tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay An to On Propagation Delay E1 or E2 to On Propagation Delay E3 or E4 to On Propagation Delay P to On Output Enable Time OE1 or OE2 to On Output Disable Time OE1 or OE2 to On 6.0 4.0 5.0 4.0 6.0 5.0 6.0 6.0 3.0 5.0 2.0 3.0 VCC = +5.0V CL = 50 pF Typ 11.0 7.5 8.5 6.5 11.0 10.0 11.5 11.0 5.5 9.0 4.0 5.0 Max 16.0 11.0 15.0 9.0 16.0 14.0 18.0 16.0 10.0 13.0 6.0 8.0 TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 6.0 4.0 5.0 4.0 6.0 5.0 6.0 6.0 3.0 5.0 2.0 3.0 Max 17.0 12.0 16.0 10.0 17.0 15.0 20.0 17.0 11.0 14.0 7.0 9.0 ns ns ns Units
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74F538
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B
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74F538 1-of-8 Decoder with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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